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13 - Electrical and Electronic Engineering, Metallurgy and Materials

University of Southampton

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Article title

Performability/energy trade-off in error-control schemes for on-chip networks

Type

D - Journal article

DOI

10.1109/TVLSI.2008.2000994

Title of journal

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Article number

Volume number

Issue number

First page of article

ISSN of journal

1063-8210

Year of publication

2010

URL

http://www.eprints.soton.ac.uk/265948

Number of additional authors

Additional information

Significance of output:

This paper describes a new metric, called interconnect performability, and its theoretical underpinning enabling for the first time the combined analysis of performance and reliability of network-on-chips used in emerging high-performance embedded computing systems.

This paper has gained recognition by influencing the direction of the emerging and important network-on-chips research area, as reflected by creating a new research thrust that is being pursued by several leading group world (US, Japan, Germany, Italy). This foundational work in energy-efficient and reliable embedded systems has led recently to £1.3M of EPSRC funding with the Universities of York and Manchester, grant number, EP/L000563/1, 2013-2017.

Interdisciplinary

Cross-referral requested

Research group

1 - Electronics and Electrical Engineering (EEE)

Proposed double-weighted

Double-weighted statement

Reserve for a double-weighted output

Non-English

English abstract