Output details
13 - Electrical and Electronic Engineering, Metallurgy and Materials
Queen's University Belfast
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Article title
Evaluation of Random Delay Insertion against DPA on FPGAs
Type
D - Journal article
Title of journal
ACM Transactions on Reconfigurable Technology and Systems
Article number
11
Volume number
4
Issue number
1
First page of article
-
ISSN of journal
1936-7406
Year of publication
2010
URL
-
Number of additional authors
2
Additional information
This paper describes the first use of Random Delay Insertion (RDI) as a side channel attack (SCA) countermeasure on a hardware security device. Previously, RDI had only been considered for microprocessors and was shown to be vulnerable to power analysis attacks. In this paper, the authors present a variant of the technique, split-RDI, that is suitable for hardware devices and demonstrate both theoretically & practically that it an effective technique to provide resistance to current power analysis attacks. This research provides an effective lightweight solution for use in resource-constrained devices, such as RFID tags.
Interdisciplinary
-
Cross-referral requested
-
Research group
D - Secure Digital Systems (SDS)
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
