Output details
15 - General Engineering
University of Kent
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Output 0 of 0 in the submission
Article title
Two-stage logarithmic converter with reduced memory requirements
Type
D - Journal article
Title of journal
IET Computers & Digital Techniques
Article number
N/A
Volume number
N/A
Issue number
N/A
First page of article
N/A
ISSN of journal
1751-861X
Year of publication
2013
URL
-
Number of additional authors
1
Additional information
This paper describes a new two-stage logarithmic converter, which is an improvement of the original work presented in a patent by Larson (US Patent 5,365,465; Texas Instruments) and compares it with recent work based on non-uniform polynomial techniques. The results showed that the Kent algorithm performs better than Larson’s version and should be used as a benchmark in future comparisons of implementation efficiency. The converter has many applications in industrial and consumer signal processing. This output was part of the material presented during an invited presentation given by Lee at the UK Design Forum (UKDF) in Manchester in 2012.
Interdisciplinary
-
Cross-referral requested
-
Research group
2 - Instrumentation, control and embedded systems
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
