Output details
15 - General Engineering
University of Cambridge
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Article title
Partial soi power LDMOS with a variable low-kappa; Dielectric buried layer and a buried P layer
Type
D - Journal article
Title of journal
IEEE Electron Device Letters
Article number
-
Volume number
31
Issue number
6
First page of article
594
ISSN of journal
0741-3106
Year of publication
2010
URL
-
Number of additional authors
4
Additional information
This is the first SOI high voltage device to incorporate a low k dielectric as buried oxide. This work supported the EPSRC Power Electronics Centre (RGS109315) - Workpackage 4 Device theme on Power IC. UCAM was awarded GBP475k from 1 July 2013. Udrea co-founded the UCAM spin-off Cambridge Microelectronics Ltd in June 2012 to commercialise this research. The company has been granted a Smart award of GBP160k from TSB (Ref: 710313 18 March 2013 - 17 Sept 2014). Udrea was appointed to the board of Cambridge Enterprise.
Interdisciplinary
-
Cross-referral requested
-
Research group
None
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-