Output details
15 - General Engineering
Swansea University
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Article title
NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants
Type
D - Journal article
Title of journal
Solid-State Electronics
Article number
-
Volume number
71
Issue number
-
First page of article
101
ISSN of journal
0038-1101
Year of publication
2012
URL
-
Number of additional authors
4
Additional information
This paper first appeared at the ULIS (Ireland) conference and was subsequently invited for publication in Solid state electronics journal, as it showed that extremely scaled junctionless transistors with channel lengths smaller than 20 nm and 5x5 nm2 cross section have large variability due to random dopant fluctuations. These junctionless devices appear as an attractive alternative to conventional junction MOSFET transistors in future device miniaturisation.
Interdisciplinary
-
Cross-referral requested
-
Research group
C - Electronic Systems Design Centre
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-