Output details
11 - Computer Science and Informatics
University of Essex
Article title
A Model-Driven Development Approach to Mapping UML State Diagrams to Synthesizable VHDL
Type
D - Journal article
Title of journal
IEEE Transactions on Computers
Article number
-
Volume number
57
Issue number
10
First page of article
1357
ISSN of journal
0018-9340
Year of publication
2008
URL
-
Number of additional authors
4
Additional information
<01> This output is an outcome of the EU ERDF INTERREG IIIA MODEASY research project that employs Model Driven Development (MDD) techniques to automatically generate synthesisable VHDL code from a high level abstract description of an electronic system, greatly simplifying he model driven design of complex state based systems. This technique has been adopted by INRIA Nord, Lille, France, the contact is Jean-Luc Dekeyser, jean-luc.dekeyser@lifl.fr.
Interdisciplinary
-
Cross-referral requested
-
Research group
A - Artificial Intelligence
Citation count
7
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
