For the current REF see the REF 2021 website REF 2021 logo

Output details

13 - Electrical and Electronic Engineering, Metallurgy and Materials

University of Strathclyde

Return to search Previous output Next output
Output 0 of 0 in the submission
Article title

Capacitor balance issues of the diode-clamped multilevel inverter operated in a quasi two-state mode

Type
D - Journal article
Title of journal
IEEE Transactions on Industrial Electronics
Article number
-
Volume number
55
Issue number
8
First page of article
3088
ISSN of journal
0278-0046
Year of publication
2008
URL
-
Number of additional authors
3
Additional information

This paper represents speculative research into high-voltage switching by hybridising series-connection and multi-level techniques. When used in this mode the capacitor charging problem of the diode clamped inverter is eliminated through a novel charge balancing technique, and the power devices may be switched at their optimum speed without incurring voltage sharing problems or impressing excessive output dv/dt. Techniques developed during this research have fed into simulations and applied research on HVDC systems, collaborative research with RTE  France [olivier.despouys@rte-france.com] and two research contracts with Mitsubishi [£245k, 2013-2014 and £45k, 2013, Steve.Langdon@crd.meuk.mee.com].

Interdisciplinary
-
Cross-referral requested
-
Research group
E - Institute for Energy and Environment (InstEE)
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-