Output details
11 - Computer Science and Informatics
University of Glasgow
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Output 0 of 0 in the submission
Output title
Design and implementation of the Quarc network on-chip
Type
E - Conference contribution
Name of conference/published proceedings
IPDPS 2009. IEEE International Symposium on Parallel & Distributed Processing, 2009.
Volume number
-
Issue number
-
First page of article
1
ISSN of proceedings
1530-2075
Year of publication
2009
URL
-
Number of additional authors
2
Additional information
<06>This work, presented at the prestigious RAW workshop, affiliated with the IPDPS conference, describes a novel Network-on-Chip design and its implementation on FPGA. The Quarc NoC combines a novel topology with a novel routing discipline to provide high-efficiency broadcast and multicast with a small footprint. The Quarc has the best multicast performance of any NoC of comparable size and node degree.
Interdisciplinary
-
Cross-referral requested
-
Research group
None
Citation count
0
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
