Output details
15 - General Engineering
University of Edinburgh (joint submission with Heriot-Watt University)
A programmable spike-timing based circuit block for reconfigurable neuromorphic computing
This paper proposes a programmable analogue cell that may be configured as a single cell or groups of cells to implement all of the functionality required for an analogue VLSI based neurocomputing system. This cell may be coupled with a communication scheme described in our paper DoI:10.1109/TCSI.2010.2089552.
This cell is suitable for reconfigurable computing in classical and neuromorphic systems for large programmable analogue designs and it provides functionality and flexibility beyond that of all comparable analogue systems in this application domain. This analogue cell is further developed in collaborative EPSRC project (EP/G063710/1, EP/G62609/1).
