Output details

Express Cube Topologies for on-Chip Interconnects

<02> Originality: Introduced a new topology for networks-on-chip based on the concept of multidrop-express channels. The topology affords rich inter-node connectivity at modest router complexity, link resources that scale linearly with the number of nodes, and has favorable layout characteristics in planar silicon.

Significance: Rich connectivity is critical for performance and energy-efficiency in networks-on-chip of many-core processors. Prior richly-connected topologies suitable for on-chip implementation required numerous link resources, area-hungry routers, and/or complex silicon layout. Multidrop-express channels overcome these limitations, affording low latency, low cost, and high energy-efficiency.

Rigour: Simulation-based performance studies backing analytical models. Detailed area and energy analysis.