Output details
11 - Computer Science and Informatics
University of Edinburgh
Output title
Efficient sequential consistency via conflict ordering
Type
E - Conference contribution
Name of conference/published proceedings
Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
Volume number
-
Issue number
-
First page of article
273
ISSN of proceedings
-
Year of publication
2012
Number of additional authors
3
Additional information
<02> Originality: This is the first hardware-based technique for implementing sequential consistency (SC) efficiently without requiring post-retirement speculation.
Significance: SC is the most intuitive memory model yet none of the current processors implement SC for performance reasons. We proposed "conflict ordering", a novel approach to SC, using which we show that hardware can support SC efficiently, incurring only 2.3% additional performance overhead compared to RMO (relaxed memory order). Published at ASPLOS 2012, one of the premier architecture conferences, with an acceptance rate of 21.5%
Rigour: Paper includes correctness proofs and cycle accurate simulation.
Interdisciplinary
-
Cross-referral requested
-
Research group
C - Institute for Computing Systems Architecture
Citation count
2
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
