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15 - General Engineering

University of Edinburgh (joint submission with Heriot-Watt University)

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Output 193 of 305 in the submission

Article title

Multi-core Architectures with Dynamically Reconfigurable Array Processors for Wireless Broadband Technologies

Type

D - Journal article

DOI

10.1109/TCAD.2009.2032361

Title of journal

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Article number

Volume number

Issue number

First page of article

1830

ISSN of journal

0278-0070

Year of publication

2009

URL

http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5324020

Number of additional authors

Additional information

Arising from EP/C546318/1 (£503k), this paper applies for the first time the Reconfigurable Instruction Cell Array (RICA) paradigm (DoI: 10.1109/TVLSI.2007.912133) to a heterogeneous multi-core architecture. Employing hundreds of different reconfigurable cores, multi-core systems have particular application for power constrained wireless personal devices.

Interdisciplinary

Cross-referral requested

Research group

B - Sensors, Signals & Systems

Proposed double-weighted

Double-weighted statement

Reserve for a double-weighted output

Non-English

English abstract