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Output details

15 - General Engineering

University of Edinburgh (joint submission with Heriot-Watt University)

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Article title

Minimizing the Effect of Process Mismatch in a Neuromorphic System Using Spike-Timing-Dependent Adaptation

Type
D - Journal article
Title of journal
IEEE Transactions on Neural Networks
Article number
-
Volume number
19
Issue number
5
First page of article
899
ISSN of journal
1045-9227
Year of publication
2008
Number of additional authors
1
Additional information

This is the first demonstration of a biologically-derived, spike-correlation learning circuit that improves the performance of a pulse-coded CMOS chip (neural or, for example, a sigma-delta converter). Device mismatches cause chip performance to degrade. This method, using pre-existing correlations in the spiking signals to ameliorate transistor mismatches, will ultimately allow new forms of self-calibrating spiking circuits to be designed for nanoscale silicon. The work was funded by EP/C516583/1, £421k,2005-09 and has influenced the work of groups in Harvard-MIT (DoI: 10.1073/pnas.1106161108) and ETH/Zurich (DoI:10.1109/IJCNN.2012.6252636).

Interdisciplinary
-
Cross-referral requested
-
Research group
B - Sensors, Signals & Systems
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-