Output details
13 - Electrical and Electronic Engineering, Metallurgy and Materials
University of Southampton
Article title
Active mode subclock power gating
Type
D - Journal article
Title of journal
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Article number
-
Volume number
n/a
Issue number
-
First page of article
1
ISSN of journal
1063-8210
Year of publication
2013
Number of additional authors
4
Additional information
Significance of output:
This paper describes a new hardware technology for reducing the standby power of embedded microprocessors, used in battery-powered digital devices. The technology has been developed collaboratively between academics in Southampton University and Engineers at ARM, Cambridge.
The technology has already been prototyped successfully in a number of ARM microprocessors and there is a plan for this technology to go into production from 2014 into various ARM processors. Contact David.Flynn@arm.com. This foundational research in power-efficient processors was instrumental in securing the recent £5.6M EPSRC Programme grant, led by Southampton, EP/K034448/1, 2013-2018.
Interdisciplinary
-
Cross-referral requested
-
Research group
None
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
