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Output details

15 - General Engineering

Output 24 of 29 in the submission

Article title

Simulink Modeling and Design of an Efficient Hardware-Constrained FPGA-Based PMSM Speed Controller

Type

D - Journal article

DOI

Title of journal

IEEE Transactions on Industrial Informatics

Article number

Volume number

Issue number

First page of article

554

ISSN of journal

1941-0050

Year of publication

2012

URL

Number of additional authors

Additional information

Interdisciplinary

Cross-referral requested

Research group

None

Proposed double-weighted

Double-weighted statement

Reserve for a double-weighted output

Non-English

English abstract