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Enabling Adaptive Techniques in Heterogeneous MPSoCs Based on Virtualization

<01>First paper to report the use and feasibility evaluation of runtime binary translation supporting the dynamic mapping of tasks across cores with different instruction-sets in Networks-on-Chip. This technique will be needed when addressing load balancing and thermal management problems in large heterogeneous many-cores. Contributions were made in a system-level simulation infrastructure, used for feasibility analysis and large-scale evaluation with multiple application scenarios, and in a concrete prototype which was used to tune the performance and power estimation models used in the system-level simulation. Extended version of a paper selected as one of the best at ReCoSoC 2011.