For the current REF see the REF 2021 website REF 2021 logo

Output details

11 - Computer Science and Informatics

De Montfort University

Return to search Previous output Next output
Output 51 of 104 in the submission
Output title

Formalising of Transactional Memory Using Interval Temporal Logic (ITL)

Type
E - Conference contribution
Name of conference/published proceedings
2012 Spring World Congress on Engineering and Technology (S-CET 2012)
Volume number
-
Issue number
-
First page of article
1
ISSN of proceedings
-
Year of publication
2012
URL
-
Number of additional authors
2
Additional information

<01> The model was added to the AnaTempura tool for the runtime verification of systems using ITL's executable subset (see http://www.tech.dmu.ac.uk/STRL/ITL).

Interdisciplinary
-
Cross-referral requested
-
Research group
D - Software Technology Research Laboratory (STRL)
Citation count
0
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-