Output details
15 - General Engineering
University of Warwick
Improved analog performance in strained-Si MOSFETs using the thickness of the silicon-germanium strain-relaxed buffer as a design parameter
This paper contributed towards a successful grant application with the EPSRC on underpinning power electronic devices (EP/K034804/1). This is a £2 million project on power semiconductors of which the first author is a Co-I. The paper investigated the thermal performance of novel semiconductor devices and was a contributing factor towards further research in thermal considerations in power electronics. The modelling techniques used in the paper contributed towards the base of expertise required for understanding the thermal performance of new electronic materials.