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A CMOS Magnitude/Phase Measurement Chip for Impedance Spectroscopy

Traditionally impedimetric circuits, used for Electrical Impedance Spectroscopy, Tomography or Bioimpedance measurements (EIS, EIT and BIS respectively) utilise discrete off-the-shelf electronic components in designs that follow the so-called “synchronous detection” architecture. This paper addresses two issues that are commonly observed but not well documented in these conventional systems: the errors that occur due to component mismatches and the inherent sensitivity and detection range issues of the synchronous detection method. An integrated realisation of an alternative technique for magnitude-phase measurements is presented, which has the potential to generate far more accurate measurements with less systematic issues.