Output details
13 - Electrical and Electronic Engineering, Metallurgy and Materials
University of Liverpool
Article title
An On-Demand Queue Management Architecture for a Programmable Traffic Manager
Type
D - Journal article
Title of journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Article number
-
Volume number
20
Issue number
10
First page of article
1849
ISSN of journal
1557-9999
Year of publication
2012
URL
-
Number of additional authors
-
Additional information
The paper presents a number of router queue manager designs, which overcome the limited scalability of current architectures by exploiting the fact that there are only a few hundred active flows in a high speed router, and that these can be dynamically mapped to a router's available resources. The designs presented in the paper were funded from Xilinx Labs (USA); one of the first to be implemented on the NetFPGA-10G board; and led to follow-on (NSF funded) collaborations with Xilinx and Rice University, USA.
Interdisciplinary
-
Cross-referral requested
-
Research group
4 - Signal Processing and Communications
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
