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An analytical comparison of the spidergon and rectangular mesh NoCs

<01> Originality: An analytical framework is developed to compare the performance merits of Spidergon NoC, as an alternative cost effective topology for Multiprocessor SoC (MPSoC) development, agains the rectangular mesh, as a well-known architecture for on-chip network development. Significance: Collaborating with Glasgow University, this study has formed the basis of our later study to propose a new architecture, called QUARC, with some interesting topological properties. Journal of “Interconnection Networks” is a leading outlet in this field. Rigor: Models extensively validated using simulation. It has been extended and used later in some subsequent papers, collaborating with the same team from Glasgow University.