Output details

Experimental observations of surface roughness in uniaxially loaded strained Si microelectromechanical systems-based structures

Strained Si is used to reduce channel resistance in state-of-the-art CMOS. Under device operating conditions this must be achieved by a smoother semiconductor surface, but had never been observed. This paper gives first evidence of surface roughness reduction and its correlation length under realistic strained conditions. This evidence-based understanding of carrier transport in MOSFETs is necessary to drive future improvements in CMOS performance. The collaborative work with UCL (Belgium) extends initial results presented at MRS 2010 and was funded by the EUFP7 NANOSIL program and Leverhulme for Professor Raskin’s one year sabbatical in Newcastle (2009-2010).