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13 - Electrical and Electronic Engineering, Metallurgy and Materials
Queen's University Belfast
Design and implementation of a field programmable CRC circuit architecture
This paper proposes a new generation of a field programmable parallel cyclic redundancy check, CRC, computation architecture that can be implemented on ASIC or FPGA technology. The architecture is scalable and enables run-time programmability and supports line rates of 40 and 100Gbps. The technology is used for implementing programmable hash functions for high-speed lookup and string matching for packet classification and Deep Packet Inspection (DPI). The proposed architecture is used for many network security related packet processing circuits, including industrial DPI solutions offered by Titan IC Systems Ltd. www.titanicsystems.com.