Output details
11 - Computer Science and Informatics
University of York
Output title
Investigating Average versus Worst-Case Timing Behavior of Data Caches and Data Scratchpads
Type
E - Conference contribution
Name of conference/published proceedings
2010 22nd Euromicro Conference on Real-Time Systems (ECRTS)
Volume number
-
Issue number
-
First page of article
165
ISSN of proceedings
-
Year of publication
2010
Number of additional authors
1
Additional information
<03>The paper shows that scratchpads are more amenable to worst-case execution time analysis
than conventional memory hierarchies (including caches).
This assertion provided a key idea within the successful FP7 project proposal T-CREST.
T-CREST is designing a time predictable architecture (CPU and memory hierarchy)
for hard real-time systems -- including scratchpads to ensure timing predictability. T-CREST
has extended the core ideas of the paper by showing the assertion holds for many core Network-on-Chip
architectures containing scratchpads. ECRTS is an international conference of high regard within the real-time systems community.
Interdisciplinary
-
Cross-referral requested
-
Research group
B - Real-Time Systems
Citation count
3
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
