You are in : Home » Results & submissions » Select UOA » 11 - Computer Science and Informatics » View submission: University of Bristol » Outputs » Detail

Output details

11 - Computer Science and Informatics

Return to search Previous output Next output

Output 0 of 0 in the submission

Article title

Low Latency and Energy Efficient Scalable Architecture for Massive NoCs Using Generalized de Bruijn Graph

Type

D - Journal article

DOI

Title of journal

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Article number

Volume number

Issue number

First page of article

1469

ISSN of journal

10638210

Year of publication

2011

URL

Number of additional authors

Additional information

This paper provides an efficient and fault tolerant method for designing topologies of networks-on-chips.

Interdisciplinary

Cross-referral requested

Research group

D - Microelectronics Group

Citation count

Proposed double-weighted

Double-weighted statement

Reserve for a double-weighted output

Non-English

English abstract