Output details
13 - Electrical and Electronic Engineering, Metallurgy and Materials
Queen's University Belfast
Article title
QCA Systolic array design
Type
D - Journal article
Title of journal
IEEE Transactions on Computers
Article number
6109234
Volume number
62
Issue number
3
First page of article
548
ISSN of journal
0018-9340
Year of publication
2013
URL
-
Number of additional authors
3
Additional information
This paper proposes the use of systolic arrays as a design methodology in QCA to allow the design of efficient QCA circuits. By applying a systolic array in QCA design, significant benefits can be achieved particularly with large systolic arrays, even more so than when applied in CMOS-based designs. The first matrix and Galois Field multipliers to be designed in QCA are presented as case-studies. This research conducted in association with Professor E.Swartzlander, University of Texas at Austin (eswartzla@aol.com) allows for the design of more complex QCA circuits so that researchers can continue to show the potential of QCA nanotechnology.
Interdisciplinary
-
Cross-referral requested
-
Research group
D - Secure Digital Systems (SDS)
Proposed double-weighted
No
Double-weighted statement
-
Reserve for a double-weighted output
No
Non-English
No
English abstract
-
